1. Field of the Invention
This invention relates generally to synchronization of a communications system, and, more specifically, to detecting block boundaries and synchronizing the system based on this information.
2. Related Art
In current satellite broadcast systems compliant with the DVB standard, a standard encoded MPEG frame begins with a known sync byte. This byte is inserted into the frame prior to encoding by the convolutional encoder in the transmitter, and hence is encoded along with the rest of the frame. At the receiver, a decoder decodes the frame, and the receiver synchronizes the system after detecting the presence of the known sync byte.
If the code has low coding gain, as is the case with the first iteration of an inner code in a serially concatenated turbo code, there is a serious risk that the receiver will not be able to detect the presence of the sync byte. Consequently, the receiver will not be able to function since synchronization of the system cannot be achieved.
In the Japanese Digital Satellite standard, a xe2x80x98superframe headerxe2x80x99 contains several fields that convey system information to the receiver. This header does not perform any synchronization function. Thus, in order for this header to be interpreted, the receiver must already be synchronized and have knowledge of the location of this header. Accordingly, the acquisition process with such systems can be unduly prolonged. In addition, the header consumes system overhead, and thus adversely impacts system throughput.
A receiver configured for use in a communications system is provided for receiving blocks of data with unencoded sync data at block boundaries. Sync data detection logic detects the presence of the sync data after the blocks have been demodulated by the demodulator, but before the symbols have been decoded. Upon detecting the presence of the sync data, the sync data detection logic determines block boundaries. It may also derive any phase rotation of the symbol constellation and determine whether or not spectrum inversion has occurred. It may then communicate the timing information to the other components of the receiver, which may include the inner and outer encoders, and bit de-interleaver, of a turbo decoder. It may also communicate the phase rotation/inversion information to the demodulator. Through these tasks, the sync data detection logic synchronizes the system.
Various parameters, codes rates and settings may be embedded or implied by the number of symbols between two consecutive instances of the sync data. Examples include the type and code rate of one or more encoders employed at the transmitter, and the number and location of any pilot symbols which may have been inserted into the block at the transmitter. By counting the number of symbols between successive instances of the sync data, the sync data detection logic can derive the parameters, code rates, and settings. The receiver can then configure itself to these parameters, code rates and settings without the need of providing this information through a block header or the like.
Other systems, methods, features and advantages of the invention will be or will become apparent to one with skill in the art upon examination of the following figures and detailed description. It is intended that all such additional systems, methods, features and advantages be included within this description, be within the scope of the invention, and be protected by the accompanying claims.